the computing power of AI chip is improved several times, and the energy efficiency is improved by over 90 times.

The latest research of Peking University team: the computing power of AI chip is improved several times, and the energy efficiency is improved by over 90 times.

In January, 2026, a research achievement published in Nature Electronics, a top international academic journal, attracted worldwide attention in the field of semiconductors and computing power. Researcher Tao Yaoyu from Peking University Institute of Artificial Intelligence and Professor Yang Yuchao from Institute of Integrated Circuits realized the multi-physical domain fusion Fourier transform system with heterogeneous integration of new post-Moore devices for the first time in the world.

This new computing architecture will increase the computing speed of Fourier transform from about 130 billion times per second to about 500 billion times per second, increase the computing power by nearly 4 times, and increase the energy efficiency by over 90 times, thus opening up a new path for the development of a new generation of computing system.
The "ceiling" of computing power in the post-Moore era and the "embarrassment" of new devices
After nearly half a century's iteration, Moore's Law with transistor miniaturization as the core has entered a bottleneck period. Traditional silicon-based chips are faced with three insurmountable walls of "miniaturization, power consumption and storage", and the growth of computing power has fallen into the dilemma of "exchanging power consumption for performance". In this context, the new post-Moore devices, such as memristors and photoelectric devices, are regarded as the best hope to break through the dilemma of computing power and energy efficiency with their unique physical empowerment computing characteristics. However, a real problem lies in front of the industry: although these new devices perform well on simple linear operators, the supported calculation method is single, which can't meet the diverse operator needs in practical applications, and it is always difficult to cross the gap from laboratory to market.

In view of this industry problem, a research team composed of researcher Tao Yaoyu from Peking University Institute of Artificial Intelligence and Professor Yang Yuchao from Institute of Integrated Circuits has launched a long-term technical research. Aiming at the "Fourier transform" which is widely used in science and engineering, the team creatively proposed a multi-physical domain fusion computing architecture.

The core innovation of this architecture lies in "heterogeneous integration" and "physical domain integration". The team systematically integrated "volatile vanadium oxide device" and "nonvolatile tantalum oxide/hafnium device", two new devices suitable for frequency conversion carriers. Among them, volatile vanadium oxide devices are good at frequency generation regulation and can complete real-time rotation factor generation; Non-volatile tantalum oxide/hafnium devices are outstanding in the integration of storage and calculation, which can realize in-situ storage and calculation and avoid the efficiency loss and power consumption increase caused by frequent data movement. Under this architecture, different computing tasks can be carried out in their most suitable physical domains (such as current, charge, light, etc.), thus maximizing the physical performance of hardware.

"It's like matching the most suitable' workshop' for different computing tasks." Dr. Cai Lei, the first author of the paper and Peking University Institute of Integrated Circuits, vividly explained that the architecture realized a set of hardware-supported multi-physical domain fusion calculation for the first time, so that the complex calculation process could be completed in the most suitable physical domain for new devices.
From the laboratory to the application scenario, solve the pain point of computing power in the frontier field
Experimental data show that this new computing architecture has achieved a significant leap in performance. On the premise of ensuring the calculation accuracy, the architecture greatly improves the calculation speed of Fourier transform from about 130 billion times per second to about 500 billion times per second, and the operation speed is increased by nearly four times. At the same time, thanks to the optimal matching of multiple physical domains, the new architecture has also performed well in reducing computing power consumption and reducing storage and interconnection resource consumption.

In addition, the architecture achieves 99.2% Fourier transform accuracy and 96.98 times higher energy efficiency. This means that the new architecture can not only "calculate quickly" but also "calculate accurately" and "consume less" when dealing with complex signal conversion tasks such as sound and image.

The significance of this technical breakthrough goes far beyond the improvement of performance parameters. Tao Yaoyu said that the new computing framework successfully solved the problem of "operator pedigree expansion" of new post-Moore devices, enabling them to support multiple computing methods at the same time, and really making new devices "run" in practical applications.

The application of this achievement is expected to provide low-delay and low-power signal processing and calculation support for frontier fields such as artificial intelligence basic model, body intelligence, automatic driving, brain-computer interface and communication system. This will not only accelerate the application of new devices in major industrial scenes, but also mark a breakthrough in the research of new generation computing architecture in China, laying a solid foundation for building an autonomous and controllable technical system in the global computing competition.

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