The quality of PCB layout directly affects the performance of the entire system, and most high-speed design theories must be ultimately implemented and verified through layout. Therefore, routing is critical in high-speed PCB design. This document analyzes the rationality of common routing scenarios in practical design and provides optimized routing strategies, focusing on three aspects: right-angle traces, differential traces, and meander traces.
The quality of PCB layout directly affects the performance of the entire system, and most high-speed design theories must be ultimately implemented and verified through layout. Therefore, routing is critical in high-speed PCB design. This document analyzes the rationality of common routing scenarios in practical design and provides optimized routing strategies, focusing on three aspects: right-angle traces, differential traces, and meander traces.
1 Right-angle Traces
Right-angle traces are generally avoided in PCB routing and have become one of the criteria for evaluating routing quality. How do right-angle traces affect signal transmission? Theoretically, right-angle traces change the trace width of the transmission line, causing impedance discontinuity. In fact, not only right-angle traces but also obtuse-angle and acute-angle traces may lead to impedance variation.
The impacts of right-angle traces on signals are mainly reflected in three aspects:
- The corner acts as a capacitive load on the transmission line, slowing down the rise time.
- Impedance discontinuity causes signal reflection.
- The right-angle tip generates electromagnetic interference (EMI).
The parasitic capacitance introduced by a right-angle transmission line corner can be calculated using the following empirical formula:
C = 61W × (εr)^(1/2) / Z0
Where:
- C: Equivalent capacitance of the corner (unit: pF)
- W: Trace width (unit: inch)
- εr: Dielectric constant of the substrate
- Z0: Characteristic impedance of the transmission line
For example, for a 4-mil 50Ω transmission line (εr = 4.3), the capacitance of one right-angle corner is approximately 0.0101 pF. The corresponding rise time variation can be estimated as:
T10–90% = 2.2 × C × Z0 / 2 = 2.2 × 0.0101 × 50 / 2 = 0.556 psCalculations show that the capacitive effect of right-angle traces is extremely small.
The increased trace width at the right angle reduces the local impedance, causing signal reflection. The equivalent impedance after trace width widening can be calculated using the impedance formula for transmission lines, and the reflection coefficient can be derived from the empirical formula:
ρ = (Zs − Z0) / (Zs + Z0)Typically, right-angle traces cause an impedance change of 7%–20%, with a maximum reflection coefficient of about 0.1. As shown in the figure below, the transmission line impedance drops to a minimum within a trace length of W/2 and recovers to normal after another W/2. The total impedance variation duration is extremely short (usually <10 ps), which is negligible for general signal transmission.
A common misconception is that right-angle tips easily emit or receive electromagnetic waves and cause EMI. However, numerous practical tests show that right-angle traces do not produce significantly more EMI than straight traces. Test accuracy may be limited by current instrument performance, but it confirms that the radiation from right-angle traces is below the measurement error of the instrument.
In summary, right-angle traces are less problematic than perceived. For applications below 1 GHz, their effects (capacitance, reflection, EMI) are barely detectable in TDR measurements. High-speed PCB design engineers should prioritize placement, power/ground design, trace design, vias, and other aspects. Nevertheless, right-angle traces should still be minimized. Attention to detail is essential for competent engineers. With the rapid development of digital circuits, signal frequencies handled by PCB engineers are increasing. In RF design above 10 GHz, small right-angle corners can become critical high-speed signal integrity issues.
2 Differential Traces
Differential signals are increasingly used in high-speed circuit design, and critical circuit signals are often designed with differential structures. Why are differential signals widely adopted, and how to ensure their performance in PCB design? These questions are addressed below.
A differential signal is defined as follows: the driver transmits two signals of equal amplitude and opposite phase, and the receiver determines the logic state (“0” or “1”) by comparing the voltage difference between the two signals. The pair of traces carrying differential signals is called differential traces.
Compared with conventional single-ended traces, differential traces have three prominent advantages:
- Strong anti-interference capability: Tight coupling between the two differential traces ensures that external noise is coupled to both traces simultaneously. The receiver only detects the voltage difference, so common-mode noise is fully rejected.
- Effective EMI suppression: The opposite polarities of the two signals generate electromagnetic fields that cancel each other. Tighter coupling reduces radiated electromagnetic energy.
- Precise timing positioning: The switching transition of differential signals occurs at the crossing point of the two signals, unlike single-ended signals that rely on two threshold voltages. This makes differential signals less sensitive to process and temperature variations, reduces timing errors, and suits low-amplitude signal circuits. The popular Low-Voltage Differential Signaling (LVDS) is a typical low-amplitude differential signaling technology.
PCB engineers focus on realizing these advantages in practical routing. The basic requirements for differential traces are equal length, equal spacing, and often close proximity. Equal length maintains opposite polarity and reduces common-mode components; equal spacing ensures consistent differential impedance and minimizes reflection. These rules should be applied flexibly based on the essence of high-speed differential signal transmission.
3 Meander Traces
Meander traces are widely used in PCB layout to adjust signal delay and meet system timing requirements. Designers must recognize that meander traces degrade signal quality and alter propagation delay and should be avoided when possible. However, intentional meandering is often necessary to ensure sufficient signal hold time or reduce skew within a signal group.
[Figure 1-8-20: Several Meander Trace Structures]
The key parameters affecting meander trace performance are parallel coupling length (Lp) and coupling spacing (S), as shown in [Figure 1-8-21]. Coupling occurs between parallel segments of meander traces in differential mode. Smaller S and larger Lp increase coupling, which reduces propagation delay and severely degrades signal quality due to crosstalk. The mechanism can be referenced to Chapter 3 (common-mode and differential-mode crosstalk analysis).
Recommendations for layout engineers when handling meander traces:
- Maximize the spacing (S) between parallel segments to at least 3H (H = distance from signal trace to reference plane), i.e., use large-radius meanders to eliminate coupling.
- Reduce the parallel coupling length Lp. Crosstalk saturates when the delay of 2×Lp approaches or exceeds the signal rise time.
- Meander traces in strip-line or embedded micro-strip configurations introduce less delay than those in micro-strip configurations. Theoretically, strip-line is not affected by differential-mode crosstalk in terms of transmission rate.
- Avoid meander traces for high-speed and timing-critical signals, especially tight-radius meanders.
- Use arbitrary-angle meander traces (Structure C in Figure 1-8-20) to reduce coupling effectively.
- In high-speed PCB design, meander traces provide no filtering or anti-interference benefits and only degrade signal quality; they are used exclusively for timing matching.
- Spiral traces can be considered for delay adjustment; simulations show superior performance compared with conventional meander traces.
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