The power supply is the foundation of a system, and a well-designed power supply is a prerequisite for stable system operation. In practical projects, the most commonly used power supply structure is an external adapter providing a DC input (5V, 9V, 12V, etc.). Various DC-DC or LDO chips are then used in PCB design to convert the input into the required power rails for the system. Therefore, we mostly deal with DC-DC and LDO power supply circuit design.
Power Supply Design Experience
The power supply is the foundation of a system, and a well-designed power supply is a prerequisite for stable system operation. In practical projects, the most commonly used power supply structure is an external adapter providing a DC input (5V, 9V, 12V, etc.). Various DC-DC or LDO chips are then used in PCB design to convert the input into the required power rails for the system. Therefore, we mostly deal with DC-DC and LDO power supply circuit design. This article covers some easily overlooked details; small improvements can optimize power supply design, enhance performance, and improve system stability.
First, let’s discuss the selection between DC-DC and LDO chips. Both have distinct advantages and disadvantages.
- DC-DC: High efficiency (~90%, up to >95%), high output current capability. Drawbacks: more external components, larger PCB area, higher cost, switching noise if filtering is poor.
- LDO: Simple external circuit, small footprint, low cost, no switching, better linearity. Efficiency depends on input-output voltage difference (lower efficiency with larger difference).
Selection Rules:
- Use LDO for small voltage difference or low current.
- Use DC-DC for large voltage difference or high current.
LDO Power Supply Design Considerations
LDO design is simple and low-cost, requiring only a few bypass capacitors. However, three key points are often ignored:
1. Heat Dissipation
Power dissipation from the voltage drop is released through the chip.
Example: 3.3V → 1.2V at 800mA
Power dissipation = (3.3–1.2) × 0.8 =
1.68W
Insufficient PCB heat dissipation causes overheating, shortening lifespan and risking burns during debugging.
2. Dropout Voltage
Take
1117 as an example: minimum dropout = 1V.
3.3V → 2.5V with 1117 is unsuitable (output ≈ 2.3V, current-dependent).
Modern LDOs achieve dropout as low as
100mV.
3. Bypass Capacitor Selection
Follow the datasheet for capacitance and type.
- Some 1117 require ≥10µF tantalum capacitors.
- Electrolytic capacitors need higher capacitance.
- ESR must be within a specified range for good high-frequency response.
DC-DC Power Supply Design Considerations
DC-DC is more complex and requires stricter layout and component choices.
1. PCB Trace Inductance
Traces have parasitic inductance (varies with width, thickness, geometry).
Rule of thumb: 1oz copper, 30mil width, 1inch length ≈
20nH.
Voltage spike formula:
V = L × di/dt
Example: 2A load, 30ns switching time
V = 20nH × 2A / 30ns =
1.33V
Even 1inch traces cause large voltage offsets, risking power failure.
Guidelines:
- Minimize length of high-current traces.
- Small signals (e.g., enable) are lower priority.
2. Via Parasitic Inductance
Rule of thumb: 50mil thickness, 10mil inner diameter ≈ 1nH per via.
- Reduce vias on high-current paths.
- Use multiple parallel vias instead of single vias to lower inductance.
3. Switching Frequency vs. Switching Speed
- Higher switching frequency → smaller inductor size/value.
- Excessively high frequency → more switching noise, higher loss, lower efficiency.
Switching Speed (rise/fall edge) introduces more noise than frequency and requires more attention.
4. Capacitor Selection
- Without size/cost constraints: use multiple capacitor values/types.
- For cost-sensitive designs: calculate/simulate based on operating frequency, voltage tolerance, and transient current.
- Simple systems: use capacitors spanning several orders of magnitude.
5. Inductor Selection
Follow the datasheet for inductance and package based on switching frequency.
Key Tip: Inductors are not bidirectional.
- Dot-marked terminal: winding start (inner layer).
- Connect the dot to the switching node, the other end to the output.
This shields the output from switching noise and reduces EMI.
Conclusion
By addressing the above points, optimizing component layout, shortening high-current/switching traces, and selecting
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