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Basic Rules for PCB Layout and Routing

PCB, or Printed Circuit Board, enables the circuit connection and functional realization between electronic components, and is also an important part of power circuit design. This article introduces the basic rules for PCB layout and routing.
Apr 2nd,2026 37 Views
PCB, or Printed Circuit Board, enables the circuit connection and functional realization between electronic components, and is also an important part of power circuit design. This article introduces the basic rules for PCB layout and routing.

Basic Component Layout Rules

  1. Layout by circuit modules: Related circuits implementing the same function are referred to as a module. Components in a circuit module should follow the principle of proximity and concentration, and digital and analog circuits should be separated.
  2. No components shall be mounted within 1.27mm of non-mounting holes such as positioning holes and standard holes; no components shall be mounted within 3.5mm (for M2.5) and 4mm (for M3) of mounting holes such as screw holes.
  3. Avoid placing vias under horizontally mounted resistors, inductors (through-hole), electrolytic capacitors and other components to prevent short circuits between vias and component housings after wave soldering.
  4. The distance from the outer side of components to the board edge shall be 5mm.
  5. The distance between the outer side of the solder pad of SMD components and the outer side of adjacent through-hole components shall be more than 2mm.
  6. Metal-housed components and metal parts (shielding boxes, etc.) shall not collide with other components, nor be close to printed wires and solder pads, with a spacing of more than 2mm. The distance from the outer side of positioning holes, fastener mounting holes, elliptical holes and other square holes on the board to the board edge shall be more than 3mm.
  7. Heating elements shall not be close to wires and thermosensitive components; high-heat devices shall be distributed evenly.
  8. Power sockets should be arranged as far as possible around the printed board, and the power sockets and the terminals of the bus bars connected to them should be arranged on the same side. Special attention should be paid to not arranging power sockets and other welded connectors between connectors, so as to facilitate the welding of these sockets and connectors, as well as the design and binding of power cables. The layout spacing of power sockets and welded connectors shall consider the convenient plugging and unplugging of power plugs.
  9. Layout of other components: All IC components are aligned on one side; polar components have clear polarity marks, and there shall be no more than two directions of polarity marks on the same printed board. If two directions appear, they are perpendicular to each other.
  10. The board routing shall be properly dense and sparse. If the difference between density and sparsity is too large, mesh copper foil shall be filled with a grid larger than 8mil (or 0.2mm).
  11. There shall be no vias on SMD solder pads to prevent solder paste loss and component cold soldering. Important signal lines are not allowed to pass through the pins of sockets.
  12. SMDs are aligned on one side, with consistent character directions and package directions.
  13. The polarity marking directions of polar devices on the same board shall be kept consistent as much as possible.

Basic Component Routing Rules

  1. Routing is prohibited in the defined routing area within ≤1mm of the PCB board edge and within 1mm of mounting holes.
  2. Power lines should be as wide as possible, not less than 18mil; signal line width should not be less than 12mil; CPU incoming and outgoing lines should not be less than 10mil (or 8mil); line spacing should not be less than 10mil.
  3. Normal vias should not be less than 30mil.
  4. Dual in-line package (DIP): solder pad 60mil, aperture 40mil;
    1/4W resistor: 5155mil (0805 SMD); solder pad 62mil, aperture 42mil for through-hole mounting;
    Non-polar capacitor: 5155mil (0805 SMD); solder pad 50mil, aperture 28mil for through-hole mounting.
  5. Note that power lines and ground lines should be radial as much as possible, and signal lines should not have loop routing.

Improving Anti-Interference Ability and Electromagnetic Compatibility

When developing electronic products with processors, how to improve anti-interference ability and electromagnetic compatibility?

1. Special attention to electromagnetic interference resistance is required for the following systems

(1) Systems with microcontrollers featuring extremely high clock frequencies and extremely fast bus cycles.
(2) Systems with high-power, high-current drive circuits, such as spark-generating relays and high-current switches.
(3) Systems with weak analog signal circuits and high-precision A/D conversion circuits.

2. Measures to enhance anti-electromagnetic interference ability

(1) Select microcontrollers with low frequencies
Choosing microcontrollers with low external clock frequencies can effectively reduce noise and improve the anti-interference ability of the system. For square waves and sine waves of the same frequency, square waves contain much more high-frequency components than sine waves.
Although the amplitude of the high-frequency components of the square wave is smaller than that of the fundamental wave, the higher the frequency, the easier it is to radiate and become a noise source. The influential high-frequency noise generated by the microcontroller is about three times the clock frequency.
(2) Reduce distortion in signal transmission
Microcontrollers are mainly manufactured with high-speed CMOS technology. The static input current of the signal input terminal is about 1mA, the input capacitance is about 10PF, and the input impedance is quite high. The output terminal of the high-speed CMOS circuit has considerable load capacity, i.e., a fairly large output value. If the output terminal of a gate is led to an input terminal with quite high input impedance through a long line, the reflection problem will be serious, which will cause signal distortion and increase system noise. When Tpd》Tr, it becomes a transmission line problem, and signal reflection, impedance matching and other issues must be considered.
The delay time of a signal on a printed board is related to the characteristic impedance of the lead, i.e., to the dielectric constant of the printed circuit board material. It can be roughly considered that the transmission speed of the signal on the printed board lead is about 1/3 to 1/2 of the speed of light. The Tr (standard delay time) of common logic components in systems composed of microcontrollers is between 3 and 18ns.
On a printed circuit board, a signal passes through a 7W resistor and a 25cm long lead, and the on-line delay time is roughly between 4 and 20ns. In other words, the shorter the lead of the signal on the printed circuit, the better, and the length should not exceed 25cm. Moreover, the number of vias should be as small as possible, no more than 2.
When the rise time of the signal is faster than the signal delay time, it must be processed according to fast electronics. At this time, the impedance matching of the transmission line should be considered. For signal transmission between integrated blocks on a printed circuit board, the situation of Td》Trd should be avoided. The larger the printed circuit board, the slower the system speed cannot be.
A rule for printed circuit board design is summarized with the following conclusion: the delay time of a signal transmitted on a printed board should not be greater than the nominal delay time of the device used.
(3) Reduce cross-interference between signal lines
A step signal with a rise time of Tr at point A is transmitted to point B through lead AB. The delay time of the signal on the AB line is Td. At point D, due to the forward transmission of the signal at point A, the signal reflection after reaching point B and the delay of the AB line, a negative pulse signal with a width of Tr will be induced after Td time. At point C, due to the transmission and reflection of the signal on AB, a positive pulse signal with a width twice the delay time of the signal on the AB line, i.e., 2Td, will be induced. This is the cross-interference between signals.
The intensity of the interference signal is related to the di/dt of the signal at point C and the distance between the lines. When the two signal lines are not very long, what is seen on AB is actually the superposition of two pulses.
Microcontrollers manufactured with CMOS technology have high input impedance, high noise and high noise margin. The superposition of 100~200mv noise on digital circuits does not affect their operation. If the AB line in the figure is an analog signal, this interference becomes intolerable. If the printed circuit board is a four-layer board with a large-area ground on one layer, or a double-layer board with a large-area ground on the reverse side of the signal line, this cross-interference between signals will be reduced.
The reason is that the large-area ground reduces the characteristic impedance of the signal line, and the reflection of the signal at the D terminal is greatly reduced. The characteristic impedance is inversely proportional to the square of the dielectric constant of the medium between the signal line and the ground, and directly proportional to the natural logarithm of the medium thickness.
If the AB line is an analog signal, to avoid the interference of the digital circuit signal line CD on AB, there should be a large-area ground under the AB line, and the distance from the AB line to the CD line should be more than 2~3 times the distance from the AB line to the ground. Local shielding ground can be used, and ground lines are arranged on the left and right sides of the lead on the side with leads.
(4) Reduce noise from the power supply
While the power supply provides energy to the system, it also adds its noise to the supplied power. The reset line, interrupt line and other control lines of the microcontroller in the circuit are easily interfered by external noise.
Strong interference on the power grid enters the circuit through the power supply. Even in battery-powered systems, the battery itself has high-frequency noise. Analog signals in analog circuits are even more unable to withstand interference from the power supply.
(5) Pay attention to the high-frequency characteristics of printed circuit boards and components
At high frequencies, the distributed inductance and capacitance of leads, vias, resistors, capacitors, connectors on the printed circuit board cannot be ignored. The distributed inductance of capacitors cannot be ignored, and the distributed capacitance of inductors cannot be ignored.
Resistors produce reflection to high-frequency signals, and the distributed capacitance of leads will take effect. When the length is greater than 1/20 of the wavelength corresponding to the noise frequency, the antenna effect occurs, and noise is radiated outward through the leads.
A via on a printed circuit board causes approximately 0.6pf of capacitance. The packaging material of an integrated circuit itself introduces 2~6pf of capacitance. A connector on a circuit board has a distributed inductance of 5~20nH. A 24-pin integrated circuit socket with dual in-line package introduces a distributed inductance of 4~18nH.
These small distributed parameters can be ignored in microcontroller systems operating at lower frequencies; but they must be paid special attention to in high-speed systems.
(6) Rational zoning of component layout
The layout position of components on the printed circuit board should fully consider the anti-electromagnetic interference problem. One of the principles is that the leads between various components should be as short as possible. In terms of layout, the analog signal part, high-speed digital circuit part and noise source part (such as relays, high-current switches, etc.) should be reasonably separated to minimize signal coupling between them.
Proper grounding wire handling: Power lines and ground lines are the most important on printed circuit boards. The main means to overcome electromagnetic interference is grounding.
For double-layer boards, the layout of ground lines is particularly exquisite. By adopting the single-point grounding method, the power supply and ground are connected to the printed circuit board from both ends of the power supply, with one contact for the power supply and one for the ground. There should be multiple return ground lines on the printed circuit board, all converging to the contact back to the power supply, which is the so-called single-point grounding.
The so-called separation of analog ground, digital ground and high-power device ground refers to separate routing, all converging to this grounding point. When connecting with signals outside the printed circuit board, shielded cables are usually used. For high-frequency and digital signals, both ends of the shielded cable are grounded. For shielded cables used for low-frequency analog signals, it is better to ground one end.
Circuits that are very sensitive to noise and interference or circuits with particularly severe high-frequency noise should be shielded with metal covers.
(7) Make good use of decoupling capacitors
A good high-frequency decoupling capacitor can filter out high-frequency components up to 1GHz. Ceramic chip capacitors or multi-layer ceramic capacitors have good high-frequency characteristics. When designing a printed circuit board, a decoupling capacitor should be added between the power supply and ground of each integrated circuit.
Decoupling capacitors have two functions: on the one hand, they are energy storage capacitors for the integrated circuit itself, providing and absorbing the charging and discharging energy of the integrated circuit at the moment of switching on and off; on the other hand, they bypass the high-frequency noise of the device.
A typical decoupling capacitor in digital circuits is 0.1uf, which has a distributed inductance of 5nH, and its parallel resonance frequency is about 7MHz. That is to say, it has a good decoupling effect on noise below 10MHz and almost no effect on noise above 40MHz.
1uf and 10uf capacitors have a parallel resonance frequency above 20MHz and have a better effect on removing high-frequency noise. It is often beneficial to add a 1uf or 10uf high-frequency capacitor where the power supply enters the printed board, even for battery-powered systems.
A charge-discharge capacitor, also known as an energy storage capacitor, should be added for every about 10 integrated circuits, and the capacitance can be selected as 10uf. Do not use electrolytic capacitors—electrolytic capacitors are made by rolling two thin films, and this rolled structure exhibits inductance at high frequencies. Use tantalum capacitors or polycarbonate capacitors instead.
The selection of decoupling capacitor value is not strict and can be calculated according to C=1/f; that is, 0.1uf for 10MHz, and between 0.1~0.01uf for systems composed of microcontrollers.

3. Experience in reducing noise and electromagnetic interference

(1) Use low-speed chips if possible, and reserve high-speed chips for key parts.
(2) The slew rate of the rising and falling edges of the control circuit can be reduced by connecting a resistor in series.
(3) Try to provide some form of damping for relays and the like.
(4) Use a clock with a frequency that meets the system requirements.
(5) The clock generator should be as close as possible to the device using the clock. The shell of the quartz crystal oscillator should be grounded.
(6) Encircle the clock area with ground lines, and keep the clock lines as short as possible.
(7) The I/O drive circuit should be as close to the edge of the printed board as possible to make it leave the printed board as soon as possible. Add filters to signals entering the printed board and signals from high-noise areas, and reduce signal reflection by connecting terminal resistors in series at the same time.
(8) Unused pins of the MCU should be connected to high level, ground, or defined as output terminals; all terminals of the integrated circuit that should be connected to power ground must be connected and not left floating.
(9) The input terminals of unused gate circuits should not be left floating; the positive input terminal of unused operational amplifiers should be grounded, and the negative input terminal should be connected to the output terminal.
(10) Use 45° folded lines instead of 90° folded lines for routing on the printed board to reduce the radiation and coupling of high-frequency signals to the outside.
(11) Divide the printed board into zones according to frequency and current switching characteristics, and keep noise components as far away as possible from non-noise components.
(12) Adopt single-point power supply and single-point grounding for single-layer and double-layer boards; make power lines and ground lines as thick as possible. Use multi-layer boards if economically feasible to reduce the parasitic inductance of the power supply and ground.
(13) Clock, bus and chip select signals should be far away from I/O lines and connectors.
(14) Analog voltage input lines and reference voltage terminals should be as far away as possible from digital circuit signal lines, especially the clock.
(15) For A/D devices, the digital part and the analog part should be unified rather than crossed.
(16) Clock lines perpendicular to I/O lines cause less interference than those parallel to I/O lines, and the pins of clock components should be far away from I/O cables.
(17) Component pins should be as short as possible, and decoupling capacitor pins should be as short as possible.
(18) Key lines should be as thick as possible with protective grounds added on both sides. High-speed lines should be short and straight.
(19) Lines sensitive to noise should not be parallel to high-current, high-speed switching lines.
(20) Do not route under quartz crystals and devices sensitive to noise.
(21) No current loops should be formed around weak signal circuits and low-frequency circuits.
(22) No loops should be formed for any signal; if unavoidable, keep the loop area as small as possible.
(23) One decoupling capacitor for each integrated circuit. A small high-frequency bypass capacitor should be added next to each electrolytic capacitor.
(24) Use large-capacity tantalum capacitors or polyester capacitors instead of electrolytic capacitors as circuit charge-discharge energy storage capacitors. When using tubular capacitors, the shell should be grounded.

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